Spin Wave Based Full Adder

TL;DR

This paper introduces a novel spin wave-based full adder that significantly reduces energy consumption and chip area compared to existing technologies, validated through micromagnetic simulations.

Contribution

It presents a new energy-efficient full adder design using spin waves, combining threshold and phase detection, with superior performance over current state-of-the-art implementations.

Findings

Consumes 22.5% less energy than SW gate based counterparts

Uses at least 22% less chip area than competing designs

Outperforms in energy efficiency compared to 22nm CMOS, MTJ, SHE, DWM, and Spin-CMOS implementations

Abstract

Spin Waves (SWs) propagate through magnetic waveguides and interfere with each other without consuming noticeable energy, which opens the road to new ultra-low energy circuit designs. In this paper we build upon SW features and propose a novel energy efficient Full Adder (FA) design consisting of The FA 1 Majority and 2 XOR gates, which outputs Sum and Carry-out are generated by means of threshold and phase detection, respectively. We validate our proposal by means of MuMax3 micromagnetic simulations and we evaluate and compare its performance with state-of-the-art SW, 22nm CMOS, Magnetic Tunnel Junction (MTJ), Spin Hall Effect (SHE), Domain Wall Motion (DWM), and Spin-CMOS implementations. Our evaluation indicates that the proposed SW FA consumes 22.5% and 43% less energy than the direct SW gate based and 22nm CMOS counterparts, respectively. Moreover it exhibits a more than 3 orders of magnitude smaller energy consumption when compared with state-of-the-art MTJ, SHE, DWM, and Spin-CMOS based FAs, and outperforms its contenders in terms of area by requiring at least 22% less chip real-estate.