Compressed Shaping: Concept and FPGA Demonstration

TL;DR

This paper introduces compressed shaping, a technique that exploits source nonuniformity to reduce channel input entropy, demonstrated through simulations and FPGA implementation, significantly lowering power consumption in optical fiber communication systems.

Contribution

It presents the concept, theoretical background, and FPGA demonstration of compressed shaping, a novel method combining data compression with probabilistic shaping for optical communications.

Findings

Compressed shaping reduces power consumption by up to 90% in FPGA tests.

The hardware overhead for compressed shaping is minimal compared to FEC.

The technique effectively exploits source nonuniformity to lower channel entropy.

Abstract

Probabilistic shaping (PS) has been widely studied and applied to optical fiber communications. The encoder of PS expends the number of bit slots and controls the probability distribution of channel input symbols. Not only studies focused on PS but also most works on optical fiber communications have assumed source uniformity (i.e. equal probability of marks and spaces) so far. On the other hand, the source information is in general nonuniform, unless bit-scrambling or other source coding techniques to balance the bit probability is performed. Interestingly, one can exploit the source nonuniformity to reduce the entropy of the channel input symbols with the PS encoder, which leads to smaller required signal-to-noise ratio at a given input logic rate. This benefit is equivalent to a combination of data compression and PS, and thus we call this technique compressed shaping. In this work, we explain its theoretical background in detail, and verify the concept by both numerical simulation and a field programmable gate array (FPGA) implementation of such a system. In particular, we find that compressed shaping can reduce power consumption in forward error correction decoding by up to 90% in nonuniform source cases. The additional hardware resources required for compressed shaping are not significant compared with forward error correction coding, and an error insertion test is successfully demonstrated with the FPGA.