Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing with Ferroelectric FETs

TL;DR

This paper introduces a novel charge-domain compute-in-memory architecture using ferroelectric FETs, significantly reducing energy consumption and leakage power while maintaining high accuracy for neural network applications.

Contribution

It presents the first nonvolatile memory-based charge-domain CiM design with a 2T1C FeFET macro, offering higher density and lower power than SRAM-based solutions.

Findings

Achieves over 47% energy reduction compared to SRAM-based charge-domain CiM.

Demonstrates high classification accuracy: over 95% for MNIST and 80% for CIFAR-10.

Operates efficiently at voltages between 0.45V and 0.90V.

Abstract

Compute-in-memory (CiM) is a promising approach to alleviating the memory wall problem for domain-specific applications. Compared to current-domain CiM solutions, charge-domain CiM shows the opportunity for higher energy efficiency and resistance to device variations. However, the area occupation and standby leakage power of existing SRAMbased charge-domain CiM (CD-CiM) are high. This paper proposes the first concept and analysis of CD-CiM using nonvolatile memory (NVM) devices. The design implementation and performance evaluation are based on a proposed 2-transistor-1-capacitor (2T1C) CiM macro using ferroelectric field-effect-transistors (FeFETs), which is free from leakage power and much denser than the SRAM solution. With the supply voltage between 0.45V and 0.90V, operating frequency between 100MHz to 1.0GHz, binary neural network application simulations show over 47%, 60%, and 64% energy consumption reduction from existing SRAM-based CD-CiM, SRAM-based current-domain CiM, and RRAM-based current-domain CiM, respectively. For classifications in MNIST and CIFAR-10 data sets, the proposed FeFETbased CD-CiM achieves an accuracy over 95% and 80%, respectively.