Special-Purpose Quantum Processor Design

TL;DR

This paper introduces a method for designing special-purpose quantum processors that optimize qubit connectivity, reducing swap gates and improving fidelity for quantum algorithms.

Contribution

It extends processor design from lattice to general planar graphs, optimizing physical couplers based on algorithm-specific two-qubit gate distributions.

Findings

Reduces swap gates by at least 104.2% on average.

Performance advantage increases with qubit number and circuit depth.

Potential to enable quantum advantage with improved fidelity.

Abstract

Full connectivity of qubits is necessary for most quantum algorithms, which is difficult to directly implement on Noisy Intermediate-Scale Quantum processors. However, inserting swap gate to enable the two-qubit gates between uncoupled qubits significantly decreases the computation result fidelity. To this end, we propose a Special-Purpose Quantum Processor Design method that can design suitable structures for different quantum algorithms. Our method extends the processor structure from two-dimensional lattice graph to general planar graph and arranges the physical couplers according to the two-qubit gate distribution between the logical qubits of the quantum algorithm and the physical constraints. Experimental results show that our design methodology, compared with other methods, could reduce the number of extra swap gates per two-qubit gate by at least 104.2% on average. Also, our method's advantage over other methods becomes more obvious as the depth and qubit number increase. The result reveals that our method is competitive in improving computation result fidelity and it has the potential to demonstrate quantum advantage under the technical conditions.