An Open-source Library of Large Integer Polynomial Multipliers

TL;DR

This paper introduces an open-source library of large integer polynomial multipliers designed for hardware cryptography, supporting rapid architecture exploration for FPGA and ASIC implementations.

Contribution

It provides a versatile library with digitized and non-digitized multipliers, along with a C++ generator for automatic Verilog HDL code and configurable ASIC synthesis scripts.

Findings

Enables quick generation of multiple polynomial multiplier architectures.

Supports FPGA and ASIC design workflows.

Facilitates exploration of optimization trade-offs in polynomial multiplication.

Abstract

Polynomial multiplication is a bottleneck in most of the public-key cryptography protocols, including Elliptic-curve cryptography and several of the post-quantum cryptography algorithms presently being studied. In this paper, we present a library of various large integer polynomial multipliers to be used in hardware cryptocores. Our library contains both digitized and non-digitized multiplier flavours for circuit designers to choose from. The library is supported by a C++ generator that automatically produces the multipliers' logic in Verilog HDL that is amenable for FPGA and ASIC designs. Moreover, for ASICs, it also generates configurable and parameterizable synthesis scripts. The features of the generator allow for a quick generation and assessment of several architectures at the same time, thus allowing a designer to easily explore the (complex) optimization search space of polynomial multiplication.