ProbLock: Probability-based Logic Locking

TL;DR

ProbLock is a novel probability-based logic locking method designed to enhance IC security by strategically inserting key gates into circuits, making unauthorized access and overproduction more difficult.

Contribution

The paper introduces ProbLock, a new logic locking technique that uses a filtering process and constraint analysis to optimally insert key gates in combinational and sequential circuits.

Findings

Tested on 40 ISCAS benchmarks

Effective in selecting optimal key gate locations

Improves security against IC piracy and overproduction

Abstract

Integrated circuit (IC) piracy and overproduction are serious issues that threaten the security and integrity of a system. Logic locking is a type of hardware obfuscation technique where additional key gates are inserted into the circuit. Only the correct key can unlock the functionality of that circuit otherwise the system produces the wrong output. In an effort to hinder these threats on ICs, we have developed a probability-based logic locking technique to protect the design of a circuit. Our proposed technique called "ProbLock" can be applied to combinational and sequential circuits through a critical selection process. We used a filtering process to select the best location of key gates based on various constraints. Each step in the filtering process generates a subset of nodes for each constraint. We also analyzed the correlation between each constraint and adjusted the strength of the constraints before inserting key gates. We have tested our algorithm on 40 benchmarks from the ISCAS '85 and ISCAS '89 suite.