AdderNet and its Minimalist Hardware Design for Energy-Efficient Artificial Intelligence
Yunhe Wang, Mingqiang Huang, Kai Han, Hanting Chen, Wei Zhang,, Chunjing Xu, Dacheng Tao

TL;DR
This paper introduces AdderNet, a minimalist neural network architecture using adder kernels instead of convolution, combined with low-bit quantization and specialized hardware, achieving significant energy savings and performance improvements for resource-constrained AI applications.
Contribution
It proposes a novel adder-based neural network architecture with hardware accelerators and quantization techniques, significantly reducing energy consumption and resource use compared to traditional CNNs.
Findings
Achieves ~81% resource reduction with int8/int16 quantization.
Provides FPGA deployment with 16% speed increase.
Outperforms CNN and other models in power and resource efficiency.
Abstract
Convolutional neural networks (CNN) have been widely used for boosting the performance of many machine intelligence tasks. However, the CNN models are usually computationally intensive and energy consuming, since they are often designed with numerous multiply-operations and considerable parameters for the accuracy reason. Thus, it is difficult to directly apply them in the resource-constrained environments such as 'Internet of Things' (IoT) devices and smart phones. To reduce the computational complexity and energy burden, here we present a novel minimalist hardware architecture using adder convolutional neural network (AdderNet), in which the original convolution is replaced by adder kernel using only additions. To maximally excavate the potential energy consumption, we explore the low-bit quantization algorithm for AdderNet with shared-scaling-factor method, and we design both…
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Advanced Neural Network Applications · Machine Learning and ELM
MethodsConvolution
