An Efficient Communication Protocol for FPGA IP Protection

TL;DR

This paper presents a secure, low-overhead FPGA IP protection scheme utilizing FSM obfuscation and PUFs, enabling pay-per-device licensing and safeguarding IP rights in FPGA-based systems.

Contribution

It introduces a novel communication protocol combined with FSM obfuscation and PUFs for FPGA IP protection, with demonstrated security and efficiency.

Findings

Secure against attacks on benchmark circuits

Low area, power, and delay overheads

Effective for pay-per-device licensing

Abstract

We introduce a protection-based IP security scheme to protect soft and firm IP cores which are used on FPGA devices. The scheme is based on Finite State Machin (FSM) obfuscation and exploits Physical Unclonable Function (PUF) for FPGA unique identification (ID) generation which help pay-per-device licensing. We introduce a communication protocol to protect the rights of parties in this market. On standard benchmark circuits, the experimental results show that our scheme is secure, attack-resilient and can be implemented with low area, power and delay overheads.