DB4HLS: A Database of High-Level Synthesis Design Space Explorations

TL;DR

DB4HLS is a comprehensive, standardized database of over 100,000 high-level synthesis design points, facilitating research and comparison of design space exploration strategies in hardware design.

Contribution

It introduces an open, extensible database of exhaustive HLS explorations, enabling standardized validation and comparison of DSE strategies.

Findings

Over 100,000 design points collected over 4 years

Open structure allows easy integration of new DSE methods

Facilitates benchmarking and validation of HLS optimization strategies

Abstract

High-Level Synthesis (HLS) frameworks allow to easily specify a large number of variants of the same hardware design by only acting on optimization directives. Nonetheless, the hardware synthesis of implementations for all possible combinations of directive values is impractical even for simple designs. Addressing this shortcoming, many HLS Design Space Exploration (DSE) strategies have been proposed to devise directive settings leading to high-quality implementations while limiting the number of synthesis runs. All these works require considerable efforts to validate the proposed strategies and/or to build the knowledge base employed to tune abstract models, as both tasks mandate the syntheses of large collections of implementations. Currently, such data gathering is performed ad-hoc, a) leading to a lack of standardization, hampering comparisons between DSE alternatives, and b) posing a very high burden to researchers willing to develop novel DSE strategies. Against this backdrop, we here introduce DB4HLS, a database of exhaustive HLS explorations comprising more than 100000 design points collected over 4 years of synthesis time. The open structure of DB4HLS allows the incremental integration of new DSEs, which can be easily defined with a dedicated domain-specific language. We think that of our database, available at https://www.db4hls.inf.usi.ch/, will be a valuable tool for the research community investigating automated strategies for the optimization of HLS-based hardware designs.