TL;DR
This paper introduces a hierarchical performance equation library (HPEL) that automates the setup of design equations for basic op-amps, enabling topology-independent analysis and sizing.
Contribution
The paper presents a comprehensive HPEL that automates performance modeling and sizing of op-amps, independent of their topology, enhancing analog design automation.
Findings
Successfully sized different op-amp topologies using HPEL.
Integrated HPEL into a structural synthesis method with thousands of topologies.
Demonstrated the approach on four circuit examples.
Abstract
The paper presents a new approach to automate the set-up of the design equations of the manual analog design process. Its main contribution is a comprehensive hierarchical performance equation library (HPEL) for op-amps. The HPEL makes the set-up of design equations independent of the topology. Based on the library and the functional block recognition method in [1], analytical performance models for various op-amp topologies are automatically instantiated. The method is currently designed for basic op-amps. In this paper, we use the method to size different op-amp topologies. Experimental results featuring four circuits are presented. The HPEL has also been integrated into a structural synthesis method featuring several thousand op-amp topologies [2].
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