A Custom 7nm CMOS Standard Cell Library for Implementing TNN-based Neuromorphic Processors

TL;DR

This paper presents a custom 7nm CMOS standard cell library optimized for implementing energy-efficient Temporal Neural Networks (TNNs) capable of brain-like sensory processing, demonstrated with a prototype for MNIST.

Contribution

It introduces highly-optimized macro extensions for a 7nm CMOS library specifically designed for TNNs, enabling compact and low-power neuromorphic processors.

Findings

Prototype with 13,750 neurons and 315,000 synapses

Achieves 1.56mm² die area for MNIST TNN

Consumes only 1.69mW power

Abstract

A set of highly-optimized custom macro extensions is developed for a 7nm CMOS cell library for implementing Temporal Neural Networks (TNNs) that can mimic brain-like sensory processing with extreme energy efficiency. A TNN prototype (13,750 neurons and 315,000 synapses) for MNIST requires only 1.56mm2 die area and consumes only 1.69mW.