Simple Mitigation Strategy for a Systematic Gate Error in IBMQ

TL;DR

This paper identifies a systematic gate error in IBM quantum computers and proposes a simple mitigation method that improves quantum circuit performance, especially for short-depth circuits.

Contribution

The paper introduces a straightforward mitigation strategy for a specific systematic error in IBMQ's $U_3$ gates, improving quantum circuit outcomes.

Findings

Systematic shift observed in $U_3$ gate angles.

Mitigation improves CHSH inequality results.

Error magnitude does not match Clifford benchmarking estimates.

Abstract

We report the observation and characterisation of a systematic error in the implementation of $U_3$ gates in the IBM quantum computers. The error appears as a consistent shift in one of the angles of the gate, whose magnitude does not correlate with IBM's cited errors calculated using Clifford randomized benchmarking. We propose a simple mitigation procedure, leading to an improvement in the observed value for the CHSH inequality, highlighting the utility of simple mitigation strategies for short-depth quantum circuits.