Scaling silicon-based quantum computing using CMOS technology: State-of-the-art, Challenges and Perspectives

TL;DR

This paper reviews the potential of CMOS technology for scaling silicon-based quantum computing, discussing current advancements, challenges, and future perspectives in leveraging semiconductor manufacturing for quantum systems.

Contribution

It provides a comprehensive analysis of how CMOS technology can be utilized to scale silicon quantum computers, highlighting recent breakthroughs and ongoing challenges.

Findings

Recent nanodevice engineering breakthroughs enable silicon qubit fabrication.

CMOS industry expertise can be applied to quantum system scaling.

Scaling challenges include device uniformity and qubit coherence maintenance.

Abstract

Complementary metal-oxide semiconductor (CMOS) technology has radically reshaped the world by taking humanity to the digital age. Cramming more transistors into the same physical space has enabled an exponential increase in computational performance, a strategy that has been recently hampered by the increasing complexity and cost of miniaturization. To continue achieving significant gains in computing performance, new computing paradigms, such as quantum computing, must be developed. However, finding the optimal physical system to process quantum information, and scale it up to the large number of qubits necessary to build a general-purpose quantum computer, remains a significant challenge. Recent breakthroughs in nanodevice engineering have shown that qubits can now be manufactured in a similar fashion to silicon field-effect transistors, opening an opportunity to leverage the know-how of the CMOS industry to address the scaling challenge. In this article, we focus on the analysis of the scaling prospects of quantum computing systems based on CMOS technology.