Fanout of 2 Triangle Shape Spin Wave Logic Gates

TL;DR

This paper introduces a novel triangle-shaped fanout of 2 spin wave logic gates, demonstrating energy efficiency improvements and comparable delay through micromagnetic simulations and comparisons with CMOS technology.

Contribution

It proposes a new triangle-shaped fanout design for 2-output spin wave logic gates, validated by simulations, with energy and delay analysis against existing spin wave and CMOS gates.

Findings

Energy reduction of 25%-50% compared to other 2-output spin wave gates.

Comparable delay to existing spin wave gates.

Significant energy savings compared to 16nm and 7nm CMOS, with higher delay overhead.

Abstract

Having multi-output logic gates saves much energy because the same structure can be used to feed multiple inputs of next stage gates simultaneously. This paper proposes novel triangle shape fanout of 2 spin wave Majority and XOR gates; the Majority gate is achieved by phase detection, whereas the XOR gate is achieved by threshold detection. The proposed logic gates are validated by means of micromagnetic simulations. Furthermore, the energy and delay are estimated for the proposed structures and compared with the state-of-the-art spin wave logic gates, and 16nm and 7nm CMOS. The results demonstrate that the proposed structures provide energy reduction of 25%-50% in comparison to the other 2-output spin-wave devices while having the same delay, and energy reduction between 43x and 0.8x when compared to the 16nm and 7nm CMOS while having delay overhead between 11x and 40x.