Learning by mistakes in memristor networks

TL;DR

This paper presents a new training algorithm for memristor networks inspired by biological learning, demonstrating scalable, hardware-friendly implementation with robust simulation results.

Contribution

Introduces a novel learning algorithm for memristor networks inspired by biological processes, with demonstrated robustness and hardware scalability.

Findings

Robust results from computer simulations of memristor networks.

The training algorithm is straightforward to implement in hardware.

The approach requires minimal peripheral computation overhead.

Abstract

Recent results in adaptive matter revived the interest in the implementation of novel devices able to perform brain-like operations. Here we introduce a training algorithm for a memristor network which is inspired in previous work on biological learning. Robust results are obtained from computer simulations of a network of voltage controlled memristive devices. Its implementation in hardware is straightforward, being scalable and requiring very little peripheral computation overhead.