Temperature Dependent Current Dispersion Study in $\beta$-Ga$_2$O$_3$ FETs Using Sub-Microsecond Pulsed IV Characteristics
Abhishek Vaidya, and Uttam Singisetti

TL;DR
This study investigates temperature-dependent current dispersion in $eta$-Ga$_2$O$_3$ FETs, revealing trap-related effects that impact high-frequency performance and demonstrating improvements with surface passivation.
Contribution
It provides a detailed analysis of trap effects and current dispersion mechanisms in $eta$-Ga$_2$O$_3$ FETs, highlighting the role of fabrication-induced traps and passivation.
Findings
Gate lag effect causes significant current dispersion in unpassivated devices.
Surface passivation with Silicon Nitride reduces current dispersion and improves RF cutoff frequency.
Trap activation energy estimated at 99 meV, affecting device transient response.
Abstract
A comprehensive study of drain current dispersion effects in -GaO FETs has been done using DC, pulsed and RF measurements. Both virtual gate effect in the gate-drain access region and interface traps under the gate are most plausible explanations for the experimentally observed pulsed current dispersion and high temperature threshold voltage shift respectively. Unpassivated devices show significant current dispersion between DC and pulsed IV response due to gate lag effect characterized by time constants in the range of 400~ to 600~. An activation energy of 99~ is estimated from temperature dependent Arrhenius plots. A variable range hopping based slow transport in conjunction with the observed shallow trap level is attributed to the observed slow transient response of drain current with respect to time. Reactive ion etching step during the device…
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