Simplified Josephson-junction fabrication process for reproducibly high-performance superconducting qubits
A. Osman, J. Simon, A. Bengtsson, S. Kosen, P. Krantz, D. Perez, M., Scigliuzzo, Jonas Bylander, and A. Fadavi Roudsari

TL;DR
This paper presents a simplified, reliable fabrication process for superconducting Josephson junctions that enhances qubit performance and scalability by reducing fabrication complexity and improving frequency predictability.
Contribution
A novel single-step fabrication technique for Josephson junctions that maintains high qubit quality and improves frequency control for scalable quantum computing.
Findings
Average qubit $T_1$ times exceed 50 microseconds.
Junction resistance variation is only 3.7% across a wafer.
Frequency variation due to junction size and inhomogeneity is below 2.5%.
Abstract
We introduce a simplified fabrication technique for Josephson junctions and demonstrate superconducting Xmon qubits with relaxation times averaging above 50s (1.5 10). Current shadow-evaporation techniques for aluminum-based Josephson junctions require a separate lithography step to deposit a patch that makes a galvanic, superconducting connection between the junction electrodes and the circuit wiring layer. The patch connection eliminates parasitic junctions, which otherwise contribute significantly to dielectric loss. In our patch-integrated cross-type (PICT) junction technique, we use one lithography step and one vacuum cycle to evaporate both the junction electrodes and the patch. In a study of more than 3600 junctions, we show an average resistance variation of 3.7 on a wafer that contains forty 0.50.5-cm chips, with junction areas…
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