Benchmarking micro-core architectures for detecting disasters at the edge
Maurice Jamieson, Nick Brown

TL;DR
This paper introduces the Eithne benchmarking framework for micro-core architectures, evaluating their suitability for real-time disaster detection at the edge using three key computational benchmarks.
Contribution
The paper presents an extensible benchmarking framework for micro-core architectures, specifically tailored for edge disaster detection applications, with implementations of LINPACK, DFT, and FFT benchmarks.
Findings
Micro-core architectures vary significantly in performance and power efficiency.
The Eithne framework enables systematic comparison of micro-core designs.
Benchmarks reveal key characteristics relevant to edge disaster detection.
Abstract
Leveraging real-time data to detect disasters such as wildfires, extreme weather, earthquakes, tsunamis, human health emergencies, or global diseases is an important opportunity. However, much of this data is generated in the field and the volumes involved mean that it is impractical for transmission back to a central data-centre for processing. Instead, edge devices are required to generate insights from sensor data streaming in, but an important question given the severe performance and power constraints that these must operate under is that of the most suitable CPU architecture. One class of device that we believe has a significant role to play here is that of micro-cores, which combine many simple low-power cores in a single chip. However, there are many to choose from, and an important question is which is most suited to what situation. This paper presents the Eithne framework,…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
