A Wearable CMOS Biosensor with 3 Designs of Energy-Resolution Scalable Time-Based Resistance to Digital Converter

TL;DR

This paper introduces three scalable energy-resolution CMOS biosensor designs with time-based resistance to digital converters, achieving high resolution and low power consumption suitable for wearable applications.

Contribution

It presents three novel energy-resolution scalable time-based resistance to digital converter designs for wearable CMOS biosensors, demonstrating high resolution and low power consumption.

Findings

Design 1 consumes 861nW at 18-bit resolution.

Design 2 achieves 20-bit resolution at 19.1μW.

Design 3 reaches 21-bit resolution at 17.6μW.

Abstract

This paper presents the design and analysis of a wearable CMOS biosensor with three different designs of energy-resolution scalable time-based resistance to digital converters (RDC), targeted towards either minimizing the energy/conversion step or maximizing bit-resolution. The implemented RDCs consist of a 3-stage differential ring oscillator which is current starved with the resistive sensor, a differential to single ended amplifier, an off-chip counter and serial interface. The first design RDC included the basic structure of time-based RDC and targeted low energy/conversion step. The second design RDC aimed to improve the rms jitter/phase noise of the oscillator with help of speed-up latches, to achieve higher bit-resolution as compared to the first design RDC. The third design RDC reduced the power consumption by scaling the technology with the improved phase-noise design, achieving 1-bit better resolution as that of the second design RDC. Using a time-based implementation, the RDCs exhibit energy-resolution scalablity, and consume 861nW with 18-bit resolution in design 1 in TSMC 0.35um technology. Design 2 and 3 consume 19.1uW with 20-bit resolution using TSMC 0.35um, and 17.6uW with 20-bit resolutions using TSMC 0.18um, respectively (both with 10ms read-time, repeated every second). With 30ms read-time, design 3 achieves 21-bit resolution, which is the highest resolution reported for a time-based ADC. The 0.35um time-based RDC is the lowest-power time-based ADC reported, while the 0.18um time-based RDC with speed-up latch offers the highest resolution. The active chip-area for all 3-designs are less than 1.1 mm^2.