Intermodular Configuration Scrubbing of On-detector FPGAs for the ARICH at Belle II

TL;DR

This paper introduces a novel intermodular configuration scrubbing system for SRAM-based FPGAs in high-energy physics detectors, enhancing radiation error correction through majority voting across modules, demonstrated with neutron irradiation tests.

Contribution

It presents a new intermodular scrubbing architecture that corrects radiation-induced errors in FPGA configurations by majority voting across multiple modules, improving reliability in high-radiation environments.

Findings

Successful fault-injection and neutron irradiation tests demonstrate error correction effectiveness.

The system outperforms the Xilinx Soft Error Mitigation controller in error correction.

Implementation in a Virtex-5 FPGA shows practical applicability for detector electronics.

Abstract

On-detector digital electronics in High-Energy Physics experiments is increasingly being implemented by means of SRAM-based FPGA, due to their capabilities of reconfiguration, real-time processing and multi-gigabit data transfer. Radiation-induced single event upsets in the configuration hinder the correct operation, since they may alter the programmed routing paths and logic functions. In most trigger and data acquisition systems, data from several front-end modules are concentrated into a single board, which then transmits data to back-end electronics for acquisition and triggering. Since the front-end modules are identical, they host identical FPGAs, which are programmed with the same bitstream. In this work, we present a novel scrubber capable of correcting radiation-induced soft-errors in the configuration of SRAM-based FPGAs by majority voting across different modules. We show an application of this system to the read-out electronics of the Aerogel Ring Imaging CHerenkov (ARICH) subdetector of the Belle2 experiment at SuperKEKB of the KEK laboratory (Tsukuba, Japan). We discuss the architecture of the system and its implementation in a Virtex-5 LX50T FPGA, in the concentrator board, for correcting the configuration of up to six Spartan-6 LX45 FPGAs, on pertaining front-end modules. We discuss results from fault-injection and neutron irradiation tests at the TRIGA reactor of the Jozef Stefan Institute (Ljubljana, Slovenia) and we compare the performance of our solution to the Xilinx Soft Error Mitigation controller.