A cold-source paradigm for steep-slope transistors based on van der Waals heterojunctions

TL;DR

This paper introduces a novel low-voltage, steep-slope transistor design using van der Waals heterojunctions of 2D materials, achieving subthermionic switching by leveraging a cold-source effect and weak carrier thermalization.

Contribution

It proposes a new device concept combining 2D heterojunctions with a cold-source effect to enable energy-efficient steep-slope transistors with simplified doping requirements.

Findings

Demonstrates subthermionic subthreshold swings via simulations.

Shows robustness against traps, band tails, and roughness.

Proposes a feasible implementation with recent 2D materials.

Abstract

The availability of transistors capable of operating at low supply voltage is essential to improve the key performance metric of computing circuits, i.e., the number of operations per unit energy. In this paper, we propose a new device concept for energy-efficient, steep-slope transistors based on heterojunctions of 2D materials. We show that by injecting electrons from an isolated and weakly dispersive band into a strongly dispersive one, subthermionic subthreshold swings can be obtained, as a result of a cold-source effect and of a reduced thermalization of carriers. This mechanism is implemented by integrating in a MOSFET architecture two different monolayer materials coupled through a van der Waals heterojunction, combining the subthermionic behavior of tunnel field-effect transistors (FETs) with the robustness of a MOSFET architecture against performance-degrading factors, such as traps, band tails and roughness. A further advantage with respect to tunnel FETs is that only an n-type or p-type doping is required to fabricate the device. In order to demonstrate the device concept and to discuss the underlying physics and the design options, we study through abinitio and full-quantum transport simulations a possible implementation that exploits two recently reported 2D materials.