Nanoscale plasticity and neuromorphic dynamics in silicon suboxide RRAM

TL;DR

This study investigates nanoscale filament dynamics in silicon suboxide RRAM devices, revealing plasticity and background conductivity effects that enable ultra-low-power neuromorphic computing with scalable device behavior.

Contribution

It provides the first nanoscale characterization of filamentary plasticity and background conductivity in silicon suboxide RRAM, linking these dynamics to neuromorphic functionality.

Findings

Nanoscale conductivity evolution shows filament plasticity and background enhancement.

Filament formation and rupture cause current-controlled voltage spikes.

Estimated energy per spike is as low as 25 attojoules.

Abstract

Resistive random-access memories, also known as memristors, whose resistance can be modulated by the electrically driven formation and disruption of conductive filaments within an insulator, are promising candidates for neuromorphic applications due to their scalability, low-power operation and diverse functional behaviours. However, understanding the dynamics of individual filaments, and the surrounding material, is challenging, owing to the typically very large cross-sectional areas of test devices relative to the nanometre scale of individual filaments. In the present work, conductive atomic force microscopy is used to study the evolution of conductivity at the nanoscale in a fully CMOS-compatible silicon suboxide thin film. Distinct filamentary plasticity and background conductivity enhancement are reported, suggesting that device behaviour might be best described by composite core (filament) and shell (background conductivity) dynamics. Furthermore, constant current measurements demonstrate an interplay between filament formation and rupture, resulting in current-controlled voltage spiking in nanoscale regions, with an estimated optimal energy consumption of 25 attojoules per spike. This is very promising for extremely low-power neuromorphic computation and suggests that the dynamic behaviour observed in larger devices should persist and improve as dimensions are scaled down.