Slim NoC: A Low-Diameter On-Chip Network Topology for High Energy Efficiency and Scalability
Maciej Besta, Syed Minhaj Hassan, Sudhakar Yalamanchili, Rachata, Ausavarungnirun, Onur Mutlu, Torsten Hoefler

TL;DR
Slim NoC (SN) is a novel on-chip network topology that leverages graph theory and finite fields to achieve minimal port count, enhancing energy efficiency and scalability for many-core chips.
Contribution
The paper introduces Slim NoC, a new topology design that uses degree-diameter graphs and non-prime finite fields to optimize port count and improve efficiency compared to existing NoC architectures.
Findings
SN outperforms traditional low-radix topologies in energy and area efficiency.
SN achieves lower latency and higher throughput than high-radix networks.
SN combined with Elastic Links enhances scalability and efficiency.
Abstract
Emerging chips with hundreds and thousands of cores require networks with unprecedented energy/area efficiency and scalability. To address this, we propose Slim NoC (SN): a new on-chip network design that delivers significant improvements in efficiency and scalability compared to the state-of-the-art. The key idea is to use two concepts from graph and number theory, degree-diameter graphs combined with non-prime finite fields, to enable the smallest number of ports for a given core count. SN is inspired by state-of-the-art off-chip topologies; it identifies and distills their advantages for NoC settings while solving several key issues that lead to significant overheads on-chip. SN provides NoC-specific layouts, which further enhance area/energy efficiency. We show how to augment SN with state-of-the-art router microarchitecture schemes such as Elastic Links, to make the network even…
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Taxonomy
TopicsInterconnection Networks and Systems · Advanced Memory and Neural Computing · Supercapacitor Materials and Fabrication
