Accelerating Irregular Computations with Hardware Transactional Memory and Active Messages

TL;DR

This paper introduces Atomic Active Messages (AAM), a novel mechanism leveraging hardware transactional memory to accelerate irregular graph computations on shared and distributed systems, demonstrating significant performance improvements.

Contribution

The paper presents AAM, a new approach that uses HTM for efficient irregular graph processing, including techniques like coarsening and coalescing to enhance performance.

Findings

AAM accelerates graph processing on Intel Haswell and IBM Blue Gene/Q.

Performance tradeoffs depend on HTM parameters.

AAM improves existing graph processing frameworks like Graph500 and Galois.

Abstract

We propose Atomic Active Messages (AAM), a mechanism that accelerates irregular graph computations on both shared- and distributed-memory machines. The key idea behind AAM is that hardware transactional memory (HTM) can be used for simple and efficient processing of irregular structures in highly parallel environments. We illustrate techniques such as coarsening and coalescing that enable hardware transactions to considerably accelerate graph processing.We conduct a detailed performance analysis of AAM on Intel Haswell and IBM Blue Gene/Q and we illustrate various performance tradeoffs between different HTM parameters that impact the efficiency of graph processing. AAM can be used to implement abstractions offered by existing programming models and to improve the performance of irregular graph processing codes such as Graph500 or Galois.