Influence of substrate-induced thermal stress on the superconducting properties of V3Si thin films
Tom Doekle Vethaak, Frederic Gustavo, Thierry Farjot, Tomas Kubart,, Patrice Gergaud, Shi-Li Zhang, Fabrice Nemouchi, Fran\c{c}ois Lefloch

TL;DR
This study investigates how substrate-induced thermal stress affects the superconducting properties of V3Si thin films, revealing that strain from substrate mismatch influences critical temperature and transition broadening.
Contribution
It provides new insights into the relationship between substrate-induced strain and superconducting properties in V3Si thin films, highlighting the role of thermal expansion mismatch.
Findings
Critical temperature up to 15.3 K after annealing.
Silicon substrates cause lower T_c and broader transitions.
Strain from thermal mismatch affects superconducting behavior.
Abstract
Thin films of superconducting VSi were prepared by means of RF sputtering from a compound VSi target at room temperature onto sapphire and oxide-coated silicon wafers, followed by rapid thermal processing under secondary vacuum. The superconducting properties of the films thus produced are found to improve with annealing temperature, which is ascribed to a reduction of defects in the polycrystalline layer. Critical temperatures () up to K were demonstrated after thermal processing, compared to less than K after deposition. The was found to always be lower on the silicon wafers, by on average K for the annealed samples. This difference, as well as a broadening of the superconducting transitions, is nearly independent of the annealing conditions. In-situ XRD measurements reveal that the silicide layer becomes strained upon heating…
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