Deep Delay Loop Reservoir Computing for Specific Emitter Identification

TL;DR

This paper introduces Deep Delay Loop Reservoir Computing (DLR), a novel photonic hardware-based architecture enabling efficient, low-latency machine learning on compact devices for tactical edge applications like RF emitter identification.

Contribution

The paper presents DLR, a new photonic reservoir computing architecture that reduces hardware complexity and latency, and enhances learning capacity without additional delay, for edge AI tasks.

Findings

DLR achieves significant reductions in hardware size and power consumption.

DLR demonstrates improved RF emitter identification accuracy.

Multiple DL layers increase learning capacity without adding latency.

Abstract

Current AI systems at the tactical edge lack the computational resources to support in-situ training and inference for situational awareness, and it is not always practical to leverage backhaul resources due to security, bandwidth, and mission latency requirements. We propose a solution through Deep delay Loop Reservoir Computing (DLR), a processing architecture supporting general machine learning algorithms on compact mobile devices by leveraging delay-loop (DL) reservoir computing in combination with innovative photonic hardware exploiting the inherent speed, and spatial, temporal and wavelength-based processing diversity of signals in the optical domain. DLR delivers reductions in form factor, hardware complexity, power consumption and latency, compared to State-of-the-Art . DLR can be implemented with a single photonic DL and a few electro-optical components. In certain cases multiple DL layers increase learning capacity of the DLR with no added latency. We demonstrate the advantages of DLR on the application of RF Specific Emitter Identification.