FPGA Implementation of Simplified Spiking Neural Network

TL;DR

This paper presents a simplified and energy-efficient FPGA implementation of a spiking neural network, enabling real-time processing of a network with 800 neurons and over 12,000 synapses, suitable for robotics and embedded systems.

Contribution

It introduces a novel simplified SNN model optimized for FPGA, demonstrating real-time operation on a Xilinx Virtex 6 with significant computational efficiency.

Findings

Real-time processing of 800-neuron network on FPGA

Efficient FPGA architecture for SNNs

Validation on Xilinx Virtex 6 FPGA

Abstract

Spiking Neural Networks (SNN) are third-generation Artificial Neural Networks (ANN) which are close to the biological neural system. In recent years SNN has become popular in the area of robotics and embedded applications, therefore, it has become imperative to explore its real-time and energy-efficient implementations. SNNs are more powerful than their predecessors because they encode temporal information and use biologically plausible plasticity rules. In this paper, a simpler and computationally efficient SNN model using FPGA architecture is described. The proposed model is validated on a Xilinx Virtex 6 FPGA and analyzes a fully connected network which consists of 800 neurons and 12,544 synapses in real-time.