New categories of Safe Faults in a processor-based Embedded System

TL;DR

This paper introduces a new classification of safe faults in pipelined embedded processors and proposes an automated method using ATPG techniques to identify these faults, aiding dependability analysis.

Contribution

It presents a novel classification of safe faults in embedded systems and an automated ATPG-based method for their identification, addressing a gap in existing EDA tools.

Findings

Safe fault classes identified in a pipelined processor

Automated ATPG-based method successfully applied

Enhanced dependability analysis for safety-critical systems

Abstract

The identification of safe faults (i.e., faults which are guaranteed not to produce any failure) in an electronic system is a crucial step when analyzing its dependability and its test plan development. Unfortunately, safe fault identification is poorly supported by available EDA tools, and thus remains an open problem. The complexity growth of modern systems used in safety-critical applications further complicates their identification. In this article, we identify some classes of safe faults within an embedded system based on a pipelined processor. A new method for automating the safe fault identification is also proposed. The safe faults belonging to each class are identified resorting to Automatic Test Pattern Generation (ATPG) techniques. The proposed methodology is applied to a sample system built around the OpenRisc1200 open source processor.