Low-Cost Implementation of Bilinear and Bicubic Image Interpolation for Real-Time Image Super-Resolution

TL;DR

This paper introduces low-cost, hardware-efficient bilinear and bicubic image interpolation methods for real-time image super-resolution, suitable for mobile and surveillance applications, implemented on FPGA with validated performance.

Contribution

It presents novel FPGA-based interpolation algorithms that are resource-efficient and improve super-resolution image quality in low-cost, real-time systems.

Findings

Validated on synthetic and real images showing improved quality

Implemented on FPGA demonstrating advantages in area and performance

Suitable for mobile and surveillance applications

Abstract

Super-resolution imaging (S.R.) is a series of techniques that enhance the resolution of an imaging system, especially in surveillance cameras where simplicity and low cost are of great importance. S.R. image reconstruction can be viewed as a three-stage process: image interpolation, image registration, and fusion. Image interpolation is one of the most critical steps in the S.R. algorithms and has a significant influence on the quality of the output image. In this paper, two hardware-efficient interpolation methods are proposed for these platforms, mainly for the mobile application. Experiments and results on the synthetic and real image sequences clearly validate the performance of the proposed scheme. They indicate that the proposed approach is practically applicable to real-world applications. The algorithms are implemented in a Field Programmable Gate Array (FPGA) device using a pipelined architecture. The implementation results show the advantages of the proposed methods regarding area, performance, and output quality.