A Survey of Resource Management for Processing-in-Memory and Near-Memory Processing Architectures

TL;DR

This survey reviews resource management techniques for processing-in-memory and near-memory architectures, highlighting their potential to address data movement bottlenecks in data-centric computing for deep learning and big data applications.

Contribution

It provides a comprehensive overview of current resource management strategies for PIM and NMP systems and discusses future challenges and opportunities in this field.

Findings

Various memory architectures enable DCC systems.

Resource management techniques are crucial for effective computation offloading.

Future challenges include power, thermal, and technology limitations.

Abstract

Due to amount of data involved in emerging deep learning and big data applications, operations related to data movement have quickly become the bottleneck. Data-centric computing (DCC), as enabled by processing-in-memory (PIM) and near-memory processing (NMP) paradigms, aims to accelerate these types of applications by moving the computation closer to the data. Over the past few years, researchers have proposed various memory architectures that enable DCC systems, such as logic layers in 3D stacked memories or charge sharing based bitwise operations in DRAM. However, application-specific memory access patterns, power and thermal concerns, memory technology limitations, and inconsistent performance gains complicate the offloading of computation in DCC systems. Therefore, designing intelligent resource management techniques for computation offloading is vital for leveraging the potential offered by this new paradigm. In this article, we survey the major trends in managing PIM and NMP-based DCC systems and provide a review of the landscape of resource management techniques employed by system designers for such systems. Additionally, we discuss the future challenges and opportunities in DCC management.