Interstrip Capacitances of the Readout Board used in Large Triple-GEM Detectors for the CMS Muon Upgrade

TL;DR

This paper combines analytical, simulation, and experimental methods to optimize the readout board design for large triple-GEM detectors in the CMS muon upgrade, focusing on reducing interstrip capacitance to improve signal quality.

Contribution

It introduces a new strip geometry configuration that significantly reduces interstrip capacitance, validated through multiple methods and adopted for the CMS detector upgrade.

Findings

Analytical and finite element analysis agree within 4.8%.

Measurements show a 17% average difference from calculations.

Modified strip design reduces capacitance by 27-29%.

Abstract

We present analytical calculations, Finite Element Analysis modeling, and physical measurements of the interstrip capacitances for different potential strip geometries and dimensions of the readout boards for the GE2/1 triple-Gas Electron Multiplier detector in the CMS muon system upgrade. The main goal of the study is to find configurations that minimize the interstrip capacitances and consequently maximize the signal-to-noise ratio for the detector. We find agreement at the 1.5--4.8% level between the two methods of calculations and on the average at the 17% level between calculations and measurements. A configuration with halved strip lengths and doubled strip widths results in a measured 27--29% reduction over the original configuration while leaving the total number of strips unchanged. We have now adopted this design modification for all eight module types of the GE2/1 detector and will produce the final detector with this new strip design.