Error protected qubits in a silicon photonic chip

TL;DR

This paper presents an integrated silicon photonic architecture that encodes multiple physical qubits per photon to create error-protected qubits, demonstrating improved quantum algorithm success rates and implementing hypergraph states for error resilience.

Contribution

It introduces a novel integrated photonic platform for entangling photons and encoding multiple qubits per photon to achieve error protection in quantum computing.

Findings

Success rate increased from 62.5% to 95.8% with error protection.

Implemented reconfigurable graph states for quantum processing.

Demonstrated hypergraph states for protection against correlated errors.

Abstract

General purpose quantum computers can, in principle, entangle a number of noisy physical qubits to realise composite qubits protected against errors. Architectures for measurement-based quantum computing intrinsically support error-protected qubits and are the most viable approach for constructing an all-photonic quantum computer. Here we propose and demonstrate an integrated silicon photonic architecture that both entangles multiple photons, and encodes multiple physical qubits on individual photons, to produce error-protected qubits. We realise reconfigurable graph states to compare several schemes with and without error-correction encodings and implement a range of quantum information processing tasks. We observe a success rate increase from 62.5% to 95.8% when running a phase estimation algorithm without and with error protection, respectively. Finally, we realise hypergraph states, which are a generalised class of resource states that offer protection against correlated errors. Our results show how quantum error-correction encodings can be implemented with resource-efficient photonic architectures to improve the performance of quantum algorithms.