A 4-Channel 10-Gbps/ch CMOS VCSEL Array Driver with on-chip Charge-pumps

TL;DR

This paper introduces a 4-channel CMOS VCSEL array driver with on-chip charge-pumps, enabling high-speed optical communication with low power consumption and improved biasing for low-temperature and radiation environments.

Contribution

It presents a novel 4-channel VCSEL driver with integrated charge-pumps fabricated in 65-nm CMOS, capable of high bias voltages from a low supply.

Findings

Capable of driving VCSELs with 2.8 V bias voltage from 2.5 V supply

Achieves 10 Gbps per channel data rate

Power consumption is 94 mW per channel

Abstract

We present the design and test results of a 4-channel 10-Gbps/ch Vertical-Cavity Surface-Emitting Laser array driver, the cpVLAD. With on-chip charge-pumps to extend the biasing headroom for the VCSELs needed for low temperature operation and mitigation of the radiation effects. The cpVLAD was fabricated in a 65-nm CMOS technology. The test results show that the cpVLAD is capable of driving VCSELs with forward bias voltages as high as 2.8 V from a 2.5 V power supply. The power consumption of the cpVLAD is 94 mW/ch.