AutoML for Multilayer Perceptron and FPGA Co-design
Philip Colangelo, Oren Segal, Alex Speicher, Martin Margala

TL;DR
This paper presents an automated approach to designing optimized multilayer perceptrons and FPGA hardware, outperforming existing methods in accuracy and efficiency across multiple benchmarks, emphasizing the benefits of co-design.
Contribution
Develops a general auto-ML flow for MLPs and FPGA hardware, demonstrating improved accuracy and hardware efficiency on diverse datasets compared to prior work.
Findings
Exceeds published MLP accuracy results.
Achieves higher throughput and efficiency on FPGA.
Shows the effectiveness of co-design in neural network and hardware optimization.
Abstract
State-of-the-art Neural Network Architectures (NNAs) are challenging to design and implement efficiently in hardware. In the past couple of years, this has led to an explosion in research and development of automatic Neural Architecture Search (NAS) tools. AutomML tools are now used to achieve state of the art NNA designs and attempt to optimize for hardware usage and design. Much of the recent research in the auto-design of NNAs has focused on convolution networks and image recognition, ignoring the fact that a significant part of the workload in data centers is general-purpose deep neural networks. In this work, we develop and test a general multilayer perceptron (MLP) flow that can take arbitrary datasets as input and automatically produce optimized NNAs and hardware designs. We test the flow on six benchmarks. Our results show we exceed the performance of currently published MLP…
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Taxonomy
MethodsConvolution
