Adiabatic theory of SET and RESET transitions

TL;DR

This paper presents an adiabatic phenomenological theory for pulse-induced phase transitions in nonvolatile memory, explaining the distinct SET and RESET processes driven by voltage and current sources, respectively.

Contribution

It introduces a unified adiabatic framework describing the phase transitions in memory devices, highlighting differences in operating modes and deriving key parameters from material properties.

Findings

Both SET and RESET transitions occur in the adiabatic regime.

Distinct operating modes: voltage-driven for SET, current-driven for RESET.

Derived expressions for characteristic temperatures and transition rates.

Abstract

We develop a phenomenological theory of pulse induced phase transformations behind the SET (from high to low resistive state) and RESET (backward) processes in nonvolatile memory. We show that in modern era devices, both evolve in the adiabatic regime with energy deposition time much shorter than that of thermalization. They are however different by the operating modes: voltage source driven for SET and current source driven for RESET. The characteristic temperatures and transition rates are expressed through material and process parameters.