Are wave union methods still suitable for 20 nm FPGA-based high-resolution (< 2 ps) time-to-digital converters?

TL;DR

This paper introduces new high-resolution TDC architectures in 20 nm FPGA, combining sub-TDL and wave union methods, demonstrating their effectiveness and revisiting the relevance of wave union in modern FPGA devices.

Contribution

The paper proposes a novel combination of sub-TDL and wave union techniques for high-resolution TDCs in 20 nm FPGAs, showing their continued effectiveness.

Findings

Proposed TDCs achieve < 2 ps resolution.

Wave union remains effective in UltraScale FPGAs.

The new structures are resource-efficient and suitable for multi-channel applications.

Abstract

This paper presents several new structures to pursue high-resolution (< 2 ps) time-to-digital converters (TDCs) in Xilinx 20 nm UltraScale field-programmable gate arrays (FPGAs). The proposed TDCs combined the advantages of 1) our newly proposed sub-tapped delay line (sub-TDL) architecture effective in removing bubbles and zero-bins and 2) the wave union (WU) A method to improve the resolution and reduce the impact introduced from ultrawide bins. We also compared the proposed WU/sub-TDL TDC with the TDC combining the dual sampling (DS) structure and the sub-TDL technique. Moreover, we introduced a binning method to improve the linearity and derived a formula of the total measurement uncertainty for a single-stage TDL-TDC to obtain its root-mean-square (RMS) resolution. Results conclude that the proposed designs are cost-effective in logic resources and have the potential for multiple-channel implementations. Different from the conclusions from a previous study, we found that the wave union is still influential in UltraScale devices when combining with our sub-TDL structure. We also compared with other published TDCs to demonstrate where the proposed TDCs stand.