Quantifying the Latency and Possible Throughput of External Interrupts on Cyber-Physical Systems

TL;DR

This paper introduces a flexible benchmarking method to measure interrupt latency and throughput on ARMv8-A platforms, addressing the lack of standardized evaluation tools for cyber-physical systems' responsiveness.

Contribution

It presents a novel, validated evaluation framework with specific test-cases and benchmark functions for assessing interrupt handling performance.

Findings

Validated seven stress test cases for interrupt performance

Defined three benchmark functions for latency and throughput

Provides a flexible evaluation method for ARMv8-A platforms

Abstract

An important characteristic of cyber-physical systems is their capability to respond, in-time, to events from their physical environment. However, to the best of our knowledge there exists no benchmark for assessing and comparing the interrupt handling performance of different software stacks. Hence, we present a flexible evaluation method for measuring the interrupt latency and throughput on ARMv8-A based platforms. We define and validate seven test-cases that stress individual parts of the overall process and combine them to three benchmark functions that provoke the minimal and maximal interrupt latency, and maximal interrupt throughput.