Development of a Low-noise Front-end ASIC for CdTe Detectors

TL;DR

This paper introduces a low-noise ASIC designed for CdTe detectors, achieving high energy resolution and effective photon detection, with a novel readout architecture to enhance performance in spectroscopic imaging.

Contribution

The paper presents a new low-noise readout architecture for CdTe detector ASICs, improving energy resolution and noise performance in spectroscopic applications.

Findings

Equivalent noise charge of 54.9 e- rms without detector connection

Energy resolution of 1.12 keV at 13.9 keV

Effective detection of photons from 6.4 keV to 122.1 keV

Abstract

We present our latest ASIC, which is used for the readout of Cadmium Telluride double-sided strip detectors (CdTe DSDs) and high spectroscopic imaging. It is implemented in a 0.35 um CMOS technology (X-Fab XH035), consists of 64 readout channels, and has a function that performs simultaneous AD conversion for each channel. The equivalent noise charge of 54.9 e- +/- 11.3 e- (rms) is measured without connecting the ASIC to any detectors. From the spectroscopy measurements using a CdTe single-sided strip detector, the energy resolution of 1.12 keV (FWHM) is obtained at 13.9 keV, and photons within the energy from 6.4 keV to 122.1 keV are detected. Based on the experimental results, we propose a new low-noise readout architecture making use of a slew-rate limited mode at the shaper followed by a peak detector circuit.