The Computational Capacity of LRC, Memristive and Hybrid Reservoirs

TL;DR

This paper analyzes the design and computational capacity of electronic reservoirs combining linear and nonlinear memristive elements, demonstrating their potential to outperform traditional reservoir computing systems in hardware implementations.

Contribution

It provides analytic insights and systematic characterization of electronic reservoirs with memristors, enabling optimal design and scalable computational capacity.

Findings

Reservoirs with memristors can match or exceed echo state networks.

Total computational capacity scales extensively with system size.

Analytic results guide the optimal design of electronic reservoirs.

Abstract

Reservoir computing is a machine learning paradigm that uses a high-dimensional dynamical system, or \emph{reservoir}, to approximate and predict time series data. The scale, speed and power usage of reservoir computers could be enhanced by constructing reservoirs out of electronic circuits, and several experimental studies have demonstrated promise in this direction. However, designing quality reservoirs requires a precise understanding of how such circuits process and store information. We analyze the feasibility and optimal design of electronic reservoirs that include both linear elements (resistors, inductors, and capacitors) and nonlinear memory elements called memristors. We provide analytic results regarding the feasibility of these reservoirs, and give a systematic characterization of their computational properties by examining the types of input-output relationships that they can approximate. This allows us to design reservoirs with optimal properties. By introducing measures of the total linear and nonlinear computational capacities of the reservoir, we are able to design electronic circuits whose total computational capacity scales extensively with the system size. Our electronic reservoirs can match or exceed the performance of conventional "echo state network" reservoirs in a form that may be directly implemented in hardware.