An Approximate Carry Estimating Simultaneous Adder with Rectification
Rajat Bhattacharjya, Vishesh Mishra, Saurabh Singh, Kaustav Goswami,, Dip Sankar Banerjee

TL;DR
This paper introduces a novel approximate adder with carry prediction and rectification logic, significantly improving speed and accuracy over traditional and state-of-the-art adders for approximate computing applications.
Contribution
It presents a new approximate adder design with carry prediction and rectification, enhancing speed and accuracy compared to existing methods.
Findings
91.2% faster than ripple-carry adder
74% more accurate than SARA and BCSA adders
Effective for low-power approximate computing
Abstract
Approximate computing has in recent times found significant applications towards lowering power, area, and time requirements for arithmetic operations. Several works done in recent years have furthered approximate computing along these directions. In this work, we propose a new approximate adder that employs a carry prediction method. This allows parallel propagation of the carry allowing faster calculations. In addition to the basic adder design, we also propose a rectification logic which would enable higher accuracy for larger computations. Experimental results show that our adder produces results 91.2% faster than the conventional ripple-carry adder. In terms of accuracy, the addition of rectification logic to the basic design produces results that are more accurate than state-of-the-art adders like SARA and BCSA by 74%.
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