Topolectric circuits: Theory and construction

TL;DR

This paper develops a general theory for creating topological lattice models using electrical LC circuits, enabling the realization of various topological phases through simple circuit designs with boundary modes detectable via impedance measurements.

Contribution

It introduces a universal method to engineer arbitrary Hermitian models in circuits using subnodes and shift capacitor coupling, broadening the scope of topolectric circuit applications.

Findings

Successfully implemented topological models like Chern and quantum spin Hall insulators in circuits.

Demonstrated boundary impedance as a signature of topological boundary modes.

Extended the approach to higher-order and three-dimensional topological semimetals.

Abstract

We highlight a general theory to engineer arbitrary Hermitian tight-binding lattice models in electrical LC circuits, where the lattice sites are replaced by the electrical nodes, connected to its neighbors and to the ground by capacitors and inductors. In particular, by supplementing each node with $n$ subnodes, where the phases of the current and voltage are the $n$ distinct roots of \emph{unity}, one can in principle realize arbitrary hopping amplitude between the sites or nodes via the \emph{shift capacitor coupling} between them. This general principle is then implemented to construct a plethora of topological models in electrical circuits, \emph{topolectric circuits}, where the robust zero-energy topological boundary modes manifest through a large boundary impedance, when the circuit is tuned to the resonance frequency. The simplicity of our circuit constructions is based on the fact that the existence of the boundary modes relies only on the Clifford algebra of the corresponding Hermitian matrices entering the Hamiltonian and not on their particular representation. This in turn enables us to implement a wide class of topological models through rather simple topolectric circuits with nodes consisting of only two subnodes. We anchor these outcomes from the numerical computation of the on-resonance impedance in circuit realizations of first-order ($m=1$), such as Chern and quantum spin Hall insulators, and second- ($m=2$) and third- ($m=3$) order topological insulators in different dimensions, featuring sharp localization on boundaries of codimensionality $d_c=m$. Finally, we subscribe to the \emph{stacked topolectric circuit} construction to engineer three-dimensional Weyl, nodal-loop, quadrupolar Dirac and Weyl semimetals, respectively displaying surface and hinge localized impedance.