ALIGN: A System for Automating Analog Layout
Tonmoy Dhar, Kishor Kunal, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Parijat Mukherjee, Sachin S. Sapatnekar, and Soner Yaldiz
TL;DR
ALIGN is an open-source system that automates the generation of analog circuit layouts from netlists, translating design rules into GDSII layouts through hierarchical block assembly and parameterized cell generation.
Contribution
It introduces a novel flow that automates analog layout synthesis from netlists, incorporating hierarchy detection and rule-based block assembly.
Findings
Successfully applied to diverse analog circuits
Automates layout generation from netlists
Generates compliant GDSII layouts
Abstract
ALIGN ("Analog Layout, Intelligently Generated from Netlists") is an open-source automatic layout generation flow for analog circuits. ALIGN translates an input SPICE netlist to an output GDSII layout, specific to a given technology, as specified by a set of design rules. The flow first automatically detects hierarchies in the circuit netlist and translates layout synthesis to a problem of hierarchical block assembly. At the lowest level, parameterized cells are generated using an abstraction of the design rules; these blocks are then assembled under geometric and electrical constraints to build the circuit layout. ALIGN has been applied to generate layouts for a diverse set of analog circuit families: low frequency analog blocks, wireline circuits, wireless circuits, and power delivery circuits.
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