LTARS: Analog Readout Front-end ASIC for Versatile TPC-applications
Tetsuichi Kishishita, S. Sumomozawa, T. Kosaka, T. Igarashi, K., Sakashita, M. Shoji, M. M. Tanaka, T. Hasegawa, K. Negishi, S. Narita, T., Nakamura, and K. Miuchi

TL;DR
This paper presents LTARS, a versatile low-noise analog front-end ASIC for TPC applications, demonstrating its performance at room and cryogenic temperatures, and proposing a simulation methodology for low-temperature electronics design.
Contribution
Development of a reusable, low-noise, wide dynamic range ASIC for TPCs, tested at cryogenic temperatures, with a novel simulation approach for low-temperature electronics.
Findings
Achieved an equivalent noise charge of 2695±71 e− at room temperature.
Measured dynamic range of 20–100 fC (low-gain) and 200–1600 fC (high-gain).
Observed noise deterioration at liquid Ar temperature.
Abstract
We designed a versatile analog front-end chip, called LTARS, for TPC-applications, primarily targeted at dual-phase liquid Ar-TPCs for neutrino experiments and negative-ion -TPCs for directional dark matter searches. Low-noise performance and wide dynamic range are two requirements for reading out the signals induced on the TPC readout channels. One of the development objectives is to establish the analog processing circuits under low temperature operation, which are designed on function block basis as reusable IPs (Intellectual Properties). The newly developed ASIC was implemented in the Silterra 180~nm CMOS technology and has 16 readout channels. We carried out the performance test at room temperature and the results showed an equivalent noise charge of 269571~e (rms) with a detector capacitance of 300~pF. The dynamic range was measured to be 20--100~fC in the low-gain…
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