High-fidelity controlled-Z gate with maximal intermediate leakage operating at the speed limit in a superconducting quantum processor
V. Neg\^irneac, H. Ali, N. Muthusubramanian, F. Battistel, R., Sagastizabal, M. S. Moreira, J. F. Marques, W. Vlothuizen, M. Beekman, N., Haider, A. Bruno, and L. DiCarlo

TL;DR
This paper presents a novel fast controlled-Z gate method for superconducting qubits that maximizes intermediate leakage for speed, achieving high fidelity and simplicity in tuning, suitable for scalable quantum computing.
Contribution
Introduction of the SNZ scheme for CZ gates that operates at the speed limit with maximal intermediate leakage and simplified tuneup process.
Findings
Achieved 99.93% fidelity in multi-transmon processors.
Realized 0.10% leakage during gate operation.
Operates at the speed limit of transverse coupling.
Abstract
We introduce the sudden variant (SNZ) of the Net Zero scheme realizing controlled- (CZ) gates by baseband flux control of transmon frequency. SNZ CZ gates operate at the speed limit of transverse coupling between computational and non-computational states by maximizing intermediate leakage. The key advantage of SNZ is tuneup simplicity, owing to the regular structure of conditional phase and leakage as a function of two control parameters. We realize SNZ CZ gates in a multi-transmon processor, achieving fidelity and leakage. SNZ is compatible with scalable schemes for quantum error correction and adaptable to generalized conditional-phase gates useful in intermediate-scale applications.
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