Ultrathin catalyst-free InAs nanowires on silicon with distinct 1D sub-band transport properties

TL;DR

This paper presents two methods for synthesizing ultrathin InAs nanowires on silicon, demonstrating their 1D sub-band transport properties through experimental measurements and simulations, advancing quantum-electronic device integration.

Contribution

The study introduces novel site-selective synthesis techniques for ultrathin InAs nanowires on silicon and verifies their 1D sub-band transport properties with detailed experimental and theoretical analysis.

Findings

Achieved InAs nanowires with diameters below 20 nm on silicon.

Observed clear conductance steps indicating 1D sub-band structure.

Simulations confirm the degeneracy and symmetry effects in transport.

Abstract

Ultrathin InAs nanowires (NW) with one-dimensional (1D) sub-band structure are promising materials for advanced quantum-electronic devices, where dimensions in the sub-30 nm diameter limit together with post-CMOS integration scenarios on Si are much desired. Here, we demonstrate two site-selective synthesis methods that achieve epitaxial, high aspect ratio InAs NWs on Si with ultrathin diameters below 20 nm. The first approach exploits direct vapor-solid growth to tune the NW diameter by interwire spacing, mask opening size and growth time. The second scheme explores a unique reverse-reaction growth by which the sidewalls of InAs NWs are thermally decomposed under controlled arsenic flux and annealing time. Interesting kinetically limited dependencies between interwire spacing and thinning dynamics are found, yielding diameters as low as 12 nm for sparse NW arrays. We clearly verify the 1D sub-band structure in ultrathin NWs by pronounced conductance steps in low-temperature transport measurements using back-gated NW-field effect transistors. Correlated simulations reveal single- and double degenerate conductance steps, which highlight the rotational hexagonal symmetry and reproduce the experimental traces in the diffusive 1D transport limit. Modelling under the realistic back-gate configuration further evidences regimes that lead to asymmetric carrier distribution and lifts of the degeneracy in dependence of gate bias.