Fast Thresholded SC-Flip Decoding of Polar Codes

TL;DR

This paper introduces a practical, fast thresholded SC-Flip decoding algorithm for polar codes that improves error correction, reduces complexity, and is efficiently implementable in hardware.

Contribution

It proposes an approximated threshold and an alternative critical set formation for TSCF decoding, enabling practical, hardware-efficient implementation without performance loss.

Findings

Achieves 0.24 to 0.41 dB performance gain over existing fast SCF decoders.

Requires 87% fewer decoding steps than traditional TSCF decoding.

Demonstrates 20% and 82% area efficiency improvements in CMOS implementation.

Abstract

SC-Flip (SCF) decoding algorithm shares the attention with the common polar code decoding approaches due to its low-complexity and improved error-correction performance. However, the inefficient criterion for locating the correct bit-flipping position in SCF decoding limits its improvements. Due to its improved bit-flipping criterion, Thresholded SCF (TSCF) decoding algorithm exhibits a superior error-correction performance and lower computational complexity than SCF decoding. However, the parameters of TSCF decoding depend on multiple channel and code parameters, and are obtained via Monte-Carlo simulations. Our main goal is to realize TSCF decoding as a practical polar decoder implementation. To this end, we first realize an approximated threshold value that is independent of the code parameters and precomputations. The proposed approximation has negligible error-correction performance degradation on the TSCF decoding. Then, we validate an alternative approach for forming a critical set that does not require precomputations, which also paves the way to the implementation of the Fast-TSCF decoder. Compared to the existing fast SCF implementations, the proposed Fast-TSCF decoder has $0.24$ to $0.41$ dB performance gain at frame error rate of $10^{-3}$, without any extra cost. Compared to the TSCF decoding, Fast-TSCF does not depend on precomputations and requires $87\%$ fewer decoding steps. Finally, implementation results in TSMC 65nm CMOS technology show that the Fast-TSCF decoder is $20\%$ and $82\%$ more area-efficient than the state-of-the-art fast SCF and fast SC-List decoder architectures, respectively.