Implementation of Ternary Weights with Resistive RAM Using a Single Sense Operation per Synapse

TL;DR

This paper presents a low-energy, resistive RAM-based ternary neural network architecture that uses a single sense operation per synapse, demonstrating robustness and improved performance on image recognition tasks.

Contribution

It introduces a novel two-transistor/two-resistor memory architecture with a precharge sense amplifier for efficient ternary weight extraction in neural networks.

Findings

Single sense operation effectively extracts ternary weights.

The scheme is resilient to process, voltage, and temperature variations.

Ternary neural networks outperform binary ones on CIFAR-10, with immunity to certain bit errors.

Abstract

The design of systems implementing low precision neural networks with emerging memories such as resistive random access memory (RRAM) is a significant lead for reducing the energy consumption of artificial intelligence. To achieve maximum energy efficiency in such systems, logic and memory should be integrated as tightly as possible. In this work, we focus on the case of ternary neural networks, where synaptic weights assume ternary values. We propose a two-transistor/two-resistor memory architecture employing a precharge sense amplifier, where the weight value can be extracted in a single sense operation. Based on experimental measurements on a hybrid 130 nm CMOS/RRAM chip featuring this sense amplifier, we show that this technique is particularly appropriate at low supply voltage, and that it is resilient to process, voltage, and temperature variations. We characterize the bit error rate in our scheme. We show based on neural network simulation on the CIFAR-10 image recognition task that the use of ternary neural networks significantly increases neural network performance, with regards to binary ones, which are often preferred for inference hardware. We finally evidence that the neural network is immune to the type of bit errors observed in our scheme, which can therefore be used without error correction.