TL;DR
This paper introduces Dopant Network Processing Units (DNPUs) as high-capacity, energy-efficient neurons for neural network emulation, demonstrating improved accuracy and potential for integration with memristor arrays in hardware implementations.
Contribution
The paper presents a novel multi-DNPU framework, moving beyond single-device limitations, and demonstrates hardware implementation with significant accuracy improvements on classification tasks.
Findings
Multi-DNPU classifier improves accuracy from 77% to 94%.
Single-layer MNIST classifier with 10 DNPUs achieves over 96% accuracy.
Hardware implementation shows potential for low-latency, energy-efficient neural emulators.
Abstract
The rapidly growing computational demands of deep neural networks require novel hardware designs. Recently, tunable nanoelectronic devices were developed based on hopping electrons through a network of dopant atoms in silicon. These "Dopant Network Processing Units" (DNPUs) are highly energy-efficient and have potentially very high throughput. By adapting the control voltages applied to its terminals, a single DNPU can solve a variety of linearly non-separable classification problems. However, using a single device has limitations due to the implicit single-node architecture. This paper presents a promising novel approach to neural information processing by introducing DNPUs as high-capacity neurons and moving from a single to a multi-neuron framework. By implementing and testing a small multi-DNPU classifier in hardware, we show that feed-forward DNPU networks improve the performance…
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