AM-DCGAN: Analog Memristive Hardware Accelerator for Deep Convolutional Generative Adversarial Networks

TL;DR

This paper introduces an analog memristive hardware accelerator for Deep Convolutional GANs, aiming to enable efficient GAN deployment on edge devices by leveraging memristive neural networks in the analog domain.

Contribution

It presents the first fully analog CMOS-memristive hardware design for DCGAN, demonstrating potential for faster and more energy-efficient GAN computations at the edge.

Findings

Simulated CMOS-memristive DCGAN architecture

Potential for reduced power consumption and increased speed

Feasibility of analog memristive implementation for GANs

Abstract

Generative Adversarial Network (GAN) is a well known computationally complex algorithm requiring signficiant computational resources in software implementations including large amount of data to be trained. This makes its implementation in edge devices with conventional microprocessor hardware a slow and difficult task. In this paper, we propose to accelerate the computationally intensive GAN using memristive neural networks in analog domain. We present a fully analog hardware design of Deep Convolutional GAN (DCGAN) based on CMOS-memristive convolutional and deconvolutional networks simulated using 180nm CMOS technology.