Exploiting Process Variations to Secure Photonic NoC Architectures from Snooping Attacks

TL;DR

This paper proposes a security framework for photonic NoCs that uses process variation signatures and architectural improvements to defend against snooping Hardware Trojans, with minimal performance overhead.

Contribution

It introduces a novel process variation-based authentication method combined with architecture-level security enhancements for photonic NoCs.

Findings

Enhanced security against snooping Trojans in PNoCs.

Achieved up to 14.2% latency overhead and 14.6% EDP overhead.

Effective across various PNoC architectures.

Abstract

The compact size and high wavelength-selectivity of microring resonators (MRs) enable photonic networks-on-chip (PNoCs) to utilize dense-wavelength-division-multiplexing (DWDM) in their photonic waveguides, and as a result, attain high bandwidth on-chip data transfers. Unfortunately, a Hardware Trojan in a PNoC can manipulate the electrical driving circuit of its MRs to cause the MRs to snoop data from the neighboring wavelength channels in a shared photonic waveguide, which introduces a serious security threat. This paper presents a framework that utilizes process variation-based authentication signatures along with architecture-level enhancements to protect against data-snooping Hardware Trojans during unicast as well as multicast transfers in PNoCs. Evaluation results indicate that our framework can improve hardware security across various PNoC architectures with minimal overheads of up to 14.2% in average latency and of up to 14.6% in energy-delay-product (EDP).